1. Field of the Invention
The present invention relates to a semiconductor device including a through-hole electrode passing through a semiconductor substrate, and a method of manufacturing the same. In addition, the present invention relates to a circuit board including a through-hole electrode passing through a semiconductor substrate and a method of manufacturing the same.
2. Description of the Related Art
A circuit device is conventionally formed, for instance, by mounting a semiconductor element, such as an IC chip, on a mounting board having a surface on which conductive paths are formed. There are two types of mounting configurations, which are face-up mounting and face-down mounting (flip chip technique), as methods for connecting the conducting paths on the mounting board to the semiconductor element.
In a case where the semiconductor device is mounted face up on the mounting board, the lower surface of the semiconductor element is fixed to the mounting board. Pad electrodes, which are formed on the upper surface of the semiconductor device, and the conducting paths on the mounting board are connected by wire bonding with thin metal wires. In the connecting method using wire bonding, however, it is necessary to secure regions in which form the thin metal wires around the semiconductor device. This causes a problem that an area necessary for mounting the semiconductor element is increased.
In a case where the semiconductor element is mounted face down on the mounting board, pad electrodes, which are arranged on the lower surface of the semiconductor element, and the conductive paths on the mounting board are connected with solder bumps or the like. By mounting the semiconductor device face down on the mounting board, an area necessary for mounting can be made equal to a size of the device. However, the mounting board has a thermal coefficient different from that of the semiconductor element. Hence, with a temperature change, thermal stress is applied to the solder bumps connecting the mounting board and the semiconductor element. The thermal stress results in a problem that a crack is generated in the solder bumps, thereby reducing connection reliability of the semiconductor element.
In order to solve this problem, a structure has been proposed in which the semiconductor element and the mounting board are connected with an interposer having a linear expansion coefficient equal to that of the chip.
By referring to a cross-sectional view of FIG. 9, descriptions will be provided for a configuration of connecting a semiconductor element by using a circuit board as an interposer. Here, a semiconductor element 101 which is an LSI chip including a large number of pads is mounted on a mounting board 104 with a circuit board 100 interposed in between. Connecting electrodes 102 connect the circuit board 100 and the pads on the lower surface of the semiconductor element 101. In addition, external electrodes 103 connect the circuit board 100 and conductive paths 105 formed on the upper surface of the mounting board 104. Furthermore, conductive patterns 106 insulated with insulating films 107 are formed respectively on the upper and lower surfaces of the circuit board 100.
Thermal stress applied to the connecting electrodes 102 is reduced by adopting, as a material of the circuit board 100, a material having a thermal coefficient closer to that of the semiconductor element 101 than that of the mounting board 104. Hence, it is possible to improve connection reliability of the connecting electrodes 102 against the thermal stress. The specific materials to be adopted for the circuit board 100 include resin, metal, ceramic or the like. Japanese Patent Application Publication No. 2001-326305 describes a technique in which a semiconductor made of silicon or the like is adopted as a material of the circuit board 100.
In the semiconductor element 101 shown in the description of the related art, however, the connecting electrodes 102 such as solder are attached respectively to electrodes 108 on the lower surface of the semiconductor device 101. Accordingly, bonding strength between the electrodes 108 and the connecting electrodes 102 is not sufficiently large, thereby causing a problem that the connecting electrodes 102 separate from the electrodes 108 due to thermal stress resulting from a temperature change and the like under the circumstances of using the semiconductor device 101
Furthermore, the connecting electrodes 102 described above are also attached to the flat surfaces of the conductive patterns 106 which are provided on the surface of the circuit board 100. For this reason, a problem is caused that the connecting electrodes 102 and the conductive patterns 106 separate from the interface therebetween, when strong thermal stress is applied thereto.